14 research outputs found
Effect of SAM (self assembled monolayer) on the Oxide Semiconductor Thin Film Transistor
학위논문 (석사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2012. 2. 한민구.현재 능동매트릭스 액정표시장치 (AMLCD)의 backplane의 재료로서 아몰포스 실리콘을 이용한 박막트랜지스터를 대부분 적용하고 있다. 그러나 새롭게 열리고 있는 디스플레이 시장에서는 고해상도 대면적 디스플레이, 3차원 디스플레이(3D), 유기발광다이오드 (AMOLED)와 같은 표시장치를 구동하기 위해서는 낮은 이동도를 가지고 있는 아몰포스 실리콘으로는 한계점을 가지고 있다. 높은 이동도를 구현하기 위해서 폴리실리콘을 이용한 유기발광다이오드(AMOLED)의 backplane으로 사용되기도 하지만 균일한 박막으로 대면적을 형성하기 어렵다는 단점을 가지고 있다.
최근 이러한 문제점을 보안하기 위한 새로운 재료로서 산화물 반도체를 이용한 박막트랜지스터가 많은 관심을 받고 있다. ZnO를 기반으로 하는 산화물 반도체는 비정질상태이면서 높은 이동도를 가지고 있기 때문에 균일한 박막을 요하는 대면적 디스플레이의 구동소자로서 충분한 자격을 가지고 있다. 또한 상온에서 증착이 가능하고 3.1 eV이상의 밴드갭을 가지고 있어 휘어지는 투명한 디스플레이 (transparent flexible display) 산업에 적용하기 위한 많은 연구도 이루어 지고 있다.
그러나 산화물 반도체는 수분, 산소, 유기용매와 같은 외부환경에 매우 민감한 반응을 보인다. 따라서 외부환경에 대한 특성 변화를 최소화하기 위해서 치밀한 패시베이션을 해야 하는데 현재 플라즈마화학증착기를 이용한 실리콘 옥사이드(SiOx)등이 널리 사용되고 있다. 또한 비진공방식의 패시베이션도 많은 연구가 진행되고 있어서 용액공정 과정 중에 발생할 수 있는 백인터페이스에 변화도 주의 깊게 살펴볼 필요가 있다. 본 논문에서는 이러한 산화물 반도체의 백인터페이스에 미치는 여러 가지 요인들에 대해서 조사하였고 자기조립단분자막을 이용하여 열화요인들을 완화 또는 제거시키기 위해서 다양한 실험을 진행하였다.
먼저 산화물 반도체 박막 트랜지스터 제작 과정 중에 소스드레인 패터닝 공정에서 산화물 반도체 백인터페이스에 발생할 수 있는 물리적, 화학적 데미지에 대해서 알아보고 이를 완화 또는 제거시키기 위해서 자기조립단분자막을 적용하였다. 소스/드레인 패터닝 방식은 두 가지로 나눌 수 있는데 백채널에치와 에치스탑퍼이다. 백채널 에치 방식은 산화물 반도체 위에 증착된 소스드레인을 습식 또는 건식방법으로 식각하는 방법으로서 대부분 플라즈마 방법을 많이 사용한다. 이와 같은 백채널 에치 방식에서 플라즈마 또는 에천트에 의해서 산화물 반도체가 열화되는데 이를 방지하기 위해서 자기조립단분자막이 적용되었고 효율적으로 플라즈마 및 에천트로 인한 데미지를 막아주었다. 백채널 에치 방식에서의 여러 가지 데미지를 완화시키기 위한 방법으로 에치스탑퍼 방식이 제안되었는데 이 방법에서도 플라즈마 데미지에 노출된다. 자리조립단분자막이 이러한 ion bombardment와 같은 플라즈마 데미지를 효율적으로 완화시켜 소자의 신뢰성을 높여 주었다. 자기조립단분자막은 산화물 반도체의 백인터페이스를 보호함으로써 에치스탑퍼 역할을 할 수 있을 것으로 기대되며 또한 추가적인 포토리소그라피 공정이 요구되지 않기 때문에 생산원가절감차원에서도 산화물 반도체의 백인터페이스를 보호하기 위한 방법 중에 하나이다.
또한 패시베이션 공정 중에도 산화물 반도체의 백인터페이스는 물리적, 화학적 데미지에 노출되어 소자의 특성이 열화되는데 이를 해결하기 위해서 자기조립단분자막의 역할에 대해서 조사하였다. 현재 비진공방식의 패시베이션막은 플라즈마화학증착기 (PECVD)를 이용한 실리콘옥사이드가 널리 사용되고 있다. 이 경우에도 플라즈마로 인해서 산화물 반도체의 백인터페이스에 데미지를 입히는 원인이 된다. 자기조립단분자막을 처리한 소자에서 이동도와 문턱전압이하에서의 기울기의 값에서 열화 정도가 작았는데 자기조립단분자막이 플라즈마 노출시에 발생하는 Ion bombardment의 영향을 완화시켜준 결과이다. 또한 자기조립단분자막은 용액공정에서 발생할 수 있는 유기용매의 산화물 반도체 표면으로의 흡착을 방지하여 Von의 변화를 최소화하였다.
이처럼 자기조립단분자막은 산화물 반도체 박막트랜지스터 과정중에 발생할 수 있는 플라즈마, 에천트, 유기용매와 같은 여러가지 물리적, 화학적 데미지를 완화시켜줌으로써 산화물 반도체의 백인터페이스를 보호하는 역할을 하고 나아가 소자의 신뢰성을 확보하는 데 많은 역할을 하였다. 더욱이 산화물 보호막으로서 에치스탑퍼와는 달리 추가적인 포토리소그라피 공정을 거치지 않기 때문에 생산원가 절감 면에서 산화물 반도체의 백인터페이스의 보호막으로 기대되는 후보이다.The oxide semiconductor TFTs have attracted considerable attention for large size displays, because the oxide semiconductors, such as IGZO and ZTO, exhibit high carrier mobility, even in an amorphous state and have good uniformity. However, the oxide semiconductor TFTs are very sensitive to environments such as moisture and oxygen. It has been reported that the gaseous molecules are strongly associated with characteristics of oxide transistors. The oxide semiconductor should be passivated with a dense passivation material, such as SiOX to block these molecules. SiOX deposited by plasma enhanced chemical vapor deposition (PECVD) is widely used in passivation materials of oxide semiconductors. In addition, solution-based passivation materials are under development for the printing process. However, TFT characteristics can be altered due to plasma damage and chemically induced damage caused by the passivation mentioned above. The oxide semiconductor is exposed to various plasma, including hydrogen, nitrogen, and oxygen radicals, during SiOX passivation by PECVD. It is well known that plasma can degrade TFT characteristics due to ion bombardment. The IGZO film becomes highly conductive by the reduction of oxygen due to the incorporation of hydrogen into the oxide semiconductor. In addition, when the oxide semiconductor is exposed to organic solvents, the adsorbed solvent molecules with high polarity on the back interface of the oxide semiconductor induce carriers in the back surface of the channel and thus threshold voltage is shifted to the negative direction .
In addition to passivation process, the oxide semiconductor is easily degraded by plasma etching gas or wet etchant of metal oxides such as Ti/Cu during source / drain (S/D) patterning process and passivation process. In order to protect the back interface of an oxide semiconductor from wet etchant or plasma damages during source / drain (S/D) patterning process, ES (etch stopper) structure is widely used in patterning of S / D. However, ES process is unfavorable for the cost reduction because it needs additional photolithographic process. And it is difficult to realize short channel TFT due to process margin such as overlap between ES and S/D. Therefore, BCE (Back Channel Etch) type is under developing not to be restricted in the cost and channel design, compared to a-Si:H TFT. However, in BCE type, the back interface of oxide semiconductor without etch barrier is directly exposed to plasma and wet etchant, and thus it is severely degraded during S / D patterning.
We investigated the effects of self-assembled monolayer (SAM), as a protection layer of an oxide semiconductor against plasma and chemically induced damages during the deposition of the passivation layer. When TFT is passivated with PECVD SiOX and solution-based materials, plasma and chemically induced damages on the back interface of the oxide semiconductor cannot be avoided. However, the hydrophobic Cl-SAM (3-chloropropyltriethoxysilane) suppressed the degradation of TFT characteristics, such as mobility and SS, due to damaged bonds and defect creation by ion bombardment during plasma treatment. The hydrophobic CH3-SAM (octyltriethoxysilane) blocked the adsorption of PMMA solvent and thus suppressed chemically induced damage caused by solution-based passivation.
Also we investigated the effect of SAM as a protection layer of the back interface of an oxide semiconductor to reduce plasma and wet etchant damages during source / drain patterning process in BCE type. When S/D metal is patterned by plasma or wet etchant without an etch stopper, the oxide semiconductor is directly exposed to plasma and wet etchant and thus the TFT characteristic such as mobility is severely degraded. In order to suppress such damage, we proposed SAM as a protection layer of an oxide semiconductor on the behalf of PECVD SiOx widely used in the etch stopper materials. In the SAM treated oxide TFT, the degradation in mobility and SS due to ion bombardment during plasma treatment is much less than in the virgin TFT. Also the hydrophobic SAM shows the possibility which it can protect the semiconductor from harch chemicals including wet etchant. In addition, there is no additional photolithographic process for SAM deposition and patterning. Therefore, we expect that the permanently bonded SAM with the oxide semiconductor can be a promising protection layer to suppress the plasma and wet etchant damages to the oxide semiconductor during S/D patterning process in the type of BCEMaste
GPGPU Performance Improvement with Increased Graphics Memory Bandwidth
MasterGraphic Processing Unit (GPU) has been highly hailed as a general-purpose (GP) high-performance computing unit in a wide variety of domains due to its high-computational capability and energy efficiency in comparison with CPU. Introducing High Bandwidth Memory (HBM), which will overcome the memory bandwidth wall within the context of GDDR5, to GPU is scheduled to take place soon. However, actual study on the impact of increased memory bandwidth on the performance of GPU with real GPGPU workloads is still lacking. In this work, we evaluated the memory bandwidth sensitivity of GPU both on the discrete GPU and on the tightly integrated CPU-GPU system.
We used a cycle accurate GPU simulator, GPGPU-Sim, to analyze the memory bandwidth sensitivity on 18 workloads from GPGPU benchmarks such as NVIDIA CUDA SDK, Rodina, and Parboil, and GPGPU-sim. Our results show most of GPU workloads from aforementioned benchmarks has low memory bandwidth sensitivity (×1.16@×2BW, ×1.25@×4BW), yet several workloads have significant speedup with increased memory bandwidth. In addition, it is found that correlation between memory bandwidth sensitivity and memory intensiveness across the workloads used in the experiment is small (r=0.0817).
We also used a cycle accurate simulator that models the tightly integrated CPU-GPU system, gem5-gpu, to evaluate the memory bandwidth sensitivity on workloads from Rodina benchmark. Our results show overall performance of the integrated CPU-GPU system over aforementioned GPU workloads improved by a factor of 1.46 between main memory bandwidth of 90 GB/s and 179 GB/s
Synthesis of Nanocrystalline Ceria for IT-SOFC by Glycine Nitrate Combustion Process
Gadolinia-doped ceria nanopowder was prepared by glycine-nitrate combustion method with different glycine/nitrate mixing ratio. The characteristics of the synthesized powder were investigated by X-ray diffraction method, transmission electron microscopy, thermal gravity, differential thermal analysis and thermo-mechanical analysis. The smallest powder was obtained with glycine/nitrate ratio 1.00 and the lowest organic and water vapor contained powder was made with glycine/nitrate ratio 1.75. According to dilatometry, fast densification was occurred around 1000℃ and shows full density over 1300℃. Finally near-fully dense ceria electrolyte was fabricated with conventional sintering technique. Glycine-nitrate process yields fine nanopowders which enable low temperature sintering and fabrication of fully dense and nanostructured oxide electrolyte
중저온형 고체 산화물 연료전지용 전해질 및 공기극 소재에 관한 연구
학위논문(박사) - 한국과학기술원 : 신소재공학과, 2009. 8., [ xi, 150 p. ]Significant efforts have been attempted to develop SOFCs operating at intermediate temperature region of 500-700℃ with high power density and sufficient durability. For the effective performance of the SOFC at the intermediate temperatures (IT-SOFC), it is necessary to develop a new solid oxide electrolyte, characterized by a sufficiently high ionic conductivity, and new cathode materials, working efficiently within this temperature range. In this study, the synthesis and characterization of electrolyte and cathode materials have been investigated to be used for IT-SOFCs.
In chapter 3, the electrical properties correlated with microstructures of dense and porous three dimensional (3D) nanocrystalline (n-CGO) electrolytes prepared by the different sintering processes were investigated. The CGO pellets of dense-nano (DN-CGO), and porous-nano (PN-CGO) with grain size of 30 ~ 70 nm and their equivalent density pellets of dense coarse (DC-CGO) and porous coarse (PC-CGO) with larger grain size were prepared. The preparation of nanocrystalline CGO electrolytes with different grain sizes and densities was dependent on the different sintering processes, by controlled heating profiles, such as one step sintering and two steps sintering techniques. The electrical conductivity of CGO pellets was characterized using ac impedance spectroscopy (IS) as a function of temperature, oxygen partial pressure and grain size. The comparable electrical conductivity behavior for DN-CGO and DC-CGO may attribute to distant grain size level of DN-CGO from critical nano-grain size. On the other hand, a decreased electrical conductivity was observed in PN-CGO with grain size of 30 nm compared to its equivalent PC-CGO, including the porous conductivity correction, which confirms the existence of space charge region affecting the defect characteristics of nanocrystalline CGO. The electrical transport properties and microstructure parameters of the 3D nanostructure...한국과학기술원 : 신소재공학과
Preparation process of N-sulfonylamide compound inexistent of Cu-catalyzed
본 발명은 구리 촉매 존재하에서 N-설포닐아미드 화합물의 제조방법에 관한 것으로 보다 상세하게는 아세틸렌 화합물, 설포닐 아지드 화합물 및 물을 염기 화합물과 구리 촉매 존재 하에 삼성분 짝지움 반응에 의해 N-설포닐아미드 화합물을 제조하는 방법에 관한 것이다.본 발명은 하기 화학식(1)의 아세틸렌 화합물, 하기 화학식(2)의 설포닐 아지드 화합물, 하기 화학식(3)의 물을 염기 화합물과 구리 촉매 하에서 삼성분 짝지움 반응을 통해 하기 화학식(4)의 N-설포닐아미드 화합물을 제조하는 방법을 나타낸다.......화학식(1) ......화학식(2) H2O......화학식(3) ......화학식(4
Synthesis and sintering behavior of based nano powders for solid oxide fuel cell
학위논문(석사) - 한국과학기술원 : 신소재공학과, 2006.2, [ iv, 62 p. ]나노 크기를 갖는 산화물 입자들은 마이크로 크기를 갖는 입자들에 비교해서 매우 상이한 물리적 화학적 특성을 보인다. 나노 입자들의 높은 비표면적은 소결시 치밀화를 촉진시키며 소결 온도를 낮춰주는 구동력이된다. 소결온도를 낮추게되면 고체 산화물 연료전지 스택을 제조함에 있어서 공소결을 가능하게하며 또한 전체적인 비용감소 효과를 기대할 수 있게된다. 이러한 관점에서 기존의 YSZ (Yttria doped Ziroconia) 전해질에 비해서 높은 이온 전도도를 보이기 때문에 유력한 대체 전해질로서 각광을 받고있는 GDC (Gd doped Ceria) 나노 분말 합성에 대한 연구가 많은 관심을 끌고있다. 그러나 수계를 통해 합성된 나노 입자들은 표면에 많은 유기물을 포함하며 쉽게 강한 응집체를 형성하는 경향이 있다. 이러한 두가지 매개 변수가 높은 소결특성을 보이는 나노 분말의 합성에 있어서 매우 중요한 인자로 여겨진다. 본 연구에서는 GDC 나노 분말의 합성 변수 및 이에 따른 소결 거동을 분석하였다. 중화 침전법과 글리신 연소합성법을 이용하여 3 ~ 20 nm 의 크기를 갖는 나노 입자를 조절하였으며 표면 특성을 효과적으로 조절하였다. 분산 용매는 GDC 나노 입자의 응집특성에 영향을 주는 가장 중요한 변수였으며 중화 침전법에서는 수열 결정화 온도, 글리신 연소합성법에서는 글리신/금속염 몰비가 각각의 방법에서 입자 크기 및 표면 특성을 조절하는 중요한 변수였다. 본 연구에서는 GDC 나노 분말의 표면 특성과 이에따른 소결 거동을 분산 용매에따른 나노 입자의 응집 특성을 고려하여 고찰하였다. 최종적으로 각각의 방법으로 합성한 GDC 전해질의 이온 전도도를 비교 분석하였다.한국과학기술원 : 신소재공학과
Synthesis and Characterization of LSGM Solid Electrolyte for Solid Oxide Fuel Cell
The family of (Sr,Mg)-doped LaGaO₃ compounds, which exhibit high ionic conductivity at 600-800℃ over a wide range of oxygen partial pressure, appears to be promising as the electrolyte for intermediate temperature solid oxide fuel cells. Conventional synthesis routes of (Sr,Mg)-doped LaGaO₃ compounds based on solid state reaction have some problems such as the formation of impurity phases, long sintering time and Ga loss during high temperature sintering. Phase stability problem especially, the formation of additional phases at the grain boundary is detrimental to the electrical properties of the electrolyte. From this point of view, we focused to synthesize single phase (Sr,Mg)-doped LaGaO₃ electrolyte at the stage of powder synthesis and to apply relatively low heattreatment temperature using novel synthesis route based on combustion method. The synthesized powder and sintered bulk electrolytes were characterized by XRD, TG-DTA, FT-IR and SEM. AC impedance spectroscopy was used to characterize the electrical transport properties of the electrolyte with the consideration of the contribution of the bulk lattice and grain boundary to the total conductivity. Finally, relationship between synthesis condition and electrical properties of the (Sr, Mg)-doped LaGaO₃ electrolytes was discussed with the consideration of phase analysis results.이 논문은 산업자원부 지원 연료전지 핵심원천기술 개
발사업의 일환으로 수행되었으며 이에 감사 드립니다
후전이금속 촉매를 이용한 탄소-탄소, 탄소-질소 형성반응에 관한 연구
학위논문(박사) - 한국과학기술원 : 화학과, 2011.2, [ iv, 106 p. ]Part 1. Copper-Catalyzed Three-Component Reactions
1.Non-Conventional Hydrative Amide Synthesis
It is shown for the first time that N-sulfonyl amides can be efficiently prepared by an unconventional approach of the hydrative reaction between terminal alkynes, sulfonyl azides, and water in the presence of copper catalyst and amine base under very mild conditions. The present route is quite general, and a wide range of alkynes and sulfonyl azides are readily coupled catalytically with water to furnish amides in high yields. A variety of labile functional groups are tolerated under the conditions, and the reaction is regioselective in that only terminal alkynes react while double or internal triple bonds are intact. The reaction can be readily scaled up and is also adaptable to a solid-phase procedure with high efficiency. Furthermore, a wide range of propargyl alcohols and sulfonyl azides react to provide β-hydroxy N-sulfonamides in good to excellent yields. Polyhydroxy amides could be synthesized stereoselectively, proving this as a new practical aldol-surrogate strategy.
2.Preparation of 2-Imino Pyrroles
A new Cu-catalyzed three-component coupling reaction between 1-alkynes, sulfonyl azides, and pyrrole derivatives has been developed for making 2-functionalized pyrrole rings. This C-C bond formation offers high efficiency and selectivity, mild reaction conditions, and a wide substrate scope.
Part 2. Transition-Metal Catalyzed C-H Bond Functionalization: Facile Construction of C-C and C-N Bond
1.Pd-Catalyzed C-H Bond Functionalization of Pyridine N-Oxides
Two catalytic protocols of the oxidative C??C bond formation have been developed on the basis of the C-H bond activation of pyridine N-oxides. Pd-catalyzed alkenylation of the N-oxides proceeds with excellent regio-, stereo-, and chemoselectivity, and the corresponding ortho-alkenylated N-oxide derivatives are obtained in good to excellent yields. Direct cross-coupling reaction of pyridine N-oxides w...한국과학기술원 : 화학과
Electrical Properties of Gadolinium-doped Ceria/Magnesia (CGO/MgO)Composite Electrolytes
Composites of gadolinium-doped ceria/magnesia(CGO/MgO) were synthesized and characterized for the electrolytes of intermediate temperature solid oxide fuel cells. XRD and SEM results revealed that composite electrolytes consisted of their own phases after sintering at 1400℃ without noticeable solid solution of Mg into CGO. As the MgO content increased, the total electrical conductivity decreased, which might be attributed to the decrease of grain boundary conductivity, possibly due to the lowering of the continuity of the CGO grains and blocking effects of the insulating MgO phase. The space charge effect may not be a significant factor to affect the electrical conductivity of the CGO/MgO composites
