32 research outputs found
Parity-Time Symmetric Capacitive Wireless Power Transfer with Extended Transfer Distance
Despite increasing popularity of capacitive wireless power transfer as a complementary technique to its inductive counterpart, the capacitive system entails a major performance bottleneck in terms of robustness of power transfer level over separating distance due to inherently low nature of electric couplings as compared to magnetic fields. This work develops an enhanced capacitive wireless power transfer system by means of incorporating the parity-time symmetry, with the capability to maintain transferred power over a significantly extended distance. General theoretical analysis is derived for parity-time symmetric capacitive power transfer based on both series and parallel coupled resonators. A practical parity-time symmetric capacitive system with a 10-W power delivery was designed and simulated. Extensive simulation using practical components indicates more than twenty-fold increase in the transfer distance than its conventional non-parity-time-symmetric capacitive counterpart, with an efficiency over 90%
A 0.5-V R-MOSFET-C Filter Design Using Subthreshold R-MOSFET Resistors and OTAs With Cross-Forward Common-Mode Cancellation Technique
รายงานวิจัยฉบับสมบูรณ์โครงการวงจรกรองแบบเวลาต่อเนื่องสำหรับระบบสื่อสารแบบไร้สายโดยใช้รูปแบบของทรานคอนดัคเตอร์ (แบบป้อนกลับกระแส)- ตัวเก็บประจุ
สำนักงานกองทุนสนับสนุนการวิจัยและสำนักงานคณะกรรมการการอุดมศึกษ
Accurate Signal-to-Noise Analysis of Derivative and Quadrature Differential FM Discriminators Based on Multi-Sinusoidal AWGN Representation
π-PEAKING SHUNT-FEEDBACK TRANSIMPEDANCE AMPLIFIER WITH BANDWIDTH ENHANCEMENT
This paper presents the development of a bandwidth enhancement technique for a resistive shunt-feedback transimpedance amplifier (TIA). The technique relies upon a π-peaking network realization using the shunt-feedback TIA as a part of the network in order to achieve a high bandwidth while maintaining a low noise performance. The output is obtained by making use of subsequent amplifier stages with the non-uniform constant-k output network for simultaneously high gain and bandwidth. Practical performance verification was provided via the designs and simulations of two π-peaking TIAs in a silicon CMOS implementation and a discrete HJFET implementation. Simulated results clearly indicates superior bandwidth of the π-peaking TIA over the conventional shunt-feedback TIA at practically no cost to circuit complexity and power consumption. </jats:p
