The UltraS: an emerging social movement

In recent years, there has been a rise in the conflict between the Italian police forces and football fans. This situation is a result of the resurgence of the UltraS (the S capital is a neologism of this study to suggest neo-fascist oriented fans' and to differentiate them from the wider hardcore football supporters -ultra’). However, despite their popularity among the Italian curve (football terraces), the UltraS have been the subject of fairly little ethnographic research. This paper is the result of ethnographic research conducted continuously between 2003-2006 and updated from 2007 to the first part of 2009. The research sought to evaluate the UltraS phenomenon via an examination of the internal and external dynamics of two nationally well-known groups located in the Italian capital of Rome (the Italian centre of the political power). The groups are the Boys Roma and the Irriducibili of Lazio who enact their performances on their respective curve (football terraces) of the city’s Olympic stadium. The present paper argues that the ideological alliance between the UltraS of Lazio and Roma (followed as example by other UltraS groups throughout Italy) , the death of Lazio fan Gabriele Sandri in 2007 (and concomitant violent UltraS’ reaction against the police) together with the existence of the UltraS Italia (a national organisation which unites the main Italian Ultras groups) are all elements that signify the beginning of a common meaningful opposition to the perceived repressive Italian State. Most importantly these elements appears indicating the UltraS as an emerging social movement

Design and implementation of a moment invariant algorithm in VLSI for pattern recognition applications

VLSI technology provides the capability to place from 10 up to 100,000 transistors on a single silicon circuit, referred to as an application-specific integrated circuit (ASIC). This allows incorporating into a single chip many algorithms that were previously limited to designs primarily implemented by special-purpose computers or dedicated processor boards. With CMOS transistor internal switching, speeds reaching 100 to 120 MHz, the algorithms incorporated into VLSI ASICs also achieve a substantial performance improvement over discrete device implementations of von Neumann architectures. In addition to the performance improvements offered, VLSI design can be customized to fit the specific needs of the application. It can then be integrated on a single chip, which can be completely simulated by the VLSI CAD tools in less time than is required to build a prototype with discrete TTL chips. With the increase in use of pattern recognition for image-processing applications, there is a growing need for special-purpose, high-performance processors that can execute these algorithms in real time. Moment invariance is a computational intensive algorithm that requires data compression and unique representations of digitized images. Moment invariant equations are analyzed for use in pattern recognition for flaw detection in digitized images as presented by Hu and Maitra. The moment invariant algorithm compresses the image to six constants, while providing a unique representation of the image that is invariant to translation, scaling, rotation, illumination, and contrast. The digitized images have 256 grey scales and a resolution of 512 x 512 pixels. Moment invariant processing at frame rates requires the use of special-purpose processors capable of a high throughput of 7.68 Megapixels/s. Methods for implementing the moment invariant algorithm into VLSI are examined, and architectures for implementing the equations are considered. After determining the most crucial time element, of the moment algorithm, the calculation is implemented in a 40-pin VLSI ASIC. Implementation of the moment calculation will allow the use of multiple VLSI ASICs in parallel. Thirty calculations are necessary to determine the moments necessary for input into the Hu and Maitra equations. This results in a total parallel-processing capability of 235.8 Million operations per second (MOPS). The use of pipelining in the design allows the multiplication function and the summation functions to be separated so that each can perform in parallel. VLSI design considerations for implementing the moment calculation are emphasized