Effect of short-acting beta blocker on the cardiac recovery after cardiopulmonary bypass

The objective of this study was to investigate the effect of beta blocker on cardiac recovery and rhythm during cardiac surgeries. Sixty surgical rheumatic heart disease patients were received esmolol 1 mg/kg or the same volume of saline prior to removal of the aortic clamp. The incidence of cardiac automatic re-beat, ventricular fibrillation after reperfusion, the heart rate after steady re-beat, vasoactive drug use during weaning from bypass, the posterior parallel time and total bypass time were decreased by esmolol treatment. In conclusion: Esmolol has a positive effect on the cardiac recovery in cardiopulmonary bypass surgeries

A novel current-mode sensing scheme for magnetic tunnel junction MRAM

In this paper, we present two integrated circuits for sensing data nondestructively from one-transistor one-magnetic tunnel junction (1T-1MTJ) magnetoresistive random access memory (MRAM). The first one is a low-power sensing circuit for MTJs with a magnetoresistance (MR) ratio larger than 10\%, and the second one is a high-sensitivity switched-current sensing circuit for MTJs with an MR ratio as low as 5\%. The circuits are designed using 0.60- and 0.18-mum CMOS processes, and their performance is verified using HSPICE. Compared with existing sensing circuits at a power supply of 3.0 V, their read access time is 1.46-3.33 times faster and power consumption is 2.67-3.85 times smaller

High-sensitivity switched-current sensing circuit for magnetic tunnel junction MRAM

A high-sensitivity switched-current sensing circuit for reading data non-destructively from 1T-1MTJ magneto-resistive random access memory (MRAM) is presented. Compared to the existing sensing circuits at a power supply of 3.0V, simulation results showed that the read access time and the power consumption are about 3 times faster and smaller

A switched-current sensing architecture for a four-state per cell magnetic tunnel junction MRAM

A current-mode binary-search sensing scheme for a four-state per cell one-transistor one-magnetic tunnel junction magneto-resistive (MR) random access memory is proposed. By using the switched-current technique, it is able to read data non-destructively with a MR ratio as low as 5\%. The sensing circuit is designed using a 0.18-mum CMOS process and the performance is verified by HSPICE simulation. At a supply voltage of 1.8 V, the data can be accessed in 17.5 ns with a power consumption of 475.9 muW. Compared to the parallel sensing approach, the proposed sensing scheme consumes less power and chip area, and requires fewer comparison steps. Compared to the conventional serial sensing approach, it allows a shorter read access time while performing the same number of comparisons