Optimisation of doped microcrystalline silicon films deposited at very low temperatures by Hot-Wire CVD

In this paper we present new results on doped μc-Si:H thin films deposited by hot-wire chemical vapour deposition (HWCVD) in the very low temperature range (125-275°C). The doped layers were obtained by the addition of diborane or phosphine in the gas phase during deposition. The incorporation of boron and phosphorus in the films and their influence on the crystalline fraction are studied by secondary ion mass spectrometry and Raman spectroscopy, respectively. Good electrical transport properties were obtained in this deposition regime, with best dark conductivities of 2.6 and 9.8 S cm -1 for the p- and n-doped films, respectively. The effect of the hydrogen dilution and the layer thickness on the electrical properties are also studied. Some technological conclusions referred to cross contamination could be deduced from the nominally undoped samples obtained in the same chamber after p- and n-type heavily doped layers

Optical analysis of textured plastic substrates to be used in thin silicon solar cells

Light confinement strategies in thin-film silicon solar cells play a crucial role in the performance of the devices. In this work, the possible use of Ag-coated stamped polymers as reflectors to be used in n-i-p solar cells is studied. Different random roughnesses (nanometer and micrometer size) have been transferred on poly(methylmethacrylate) (PMMA) by hot embossing. Morphological and optical analyses of masters, stamped polymers and reflectors have been carried out evidencing a positive surface transference on the polymer and the viability of a further application in solar cells

Microcrystalline silicon thin film transistors obtained by Hot-Wire CVD

Polysilicon thin film transistors (TFT) are of great interest in the field of large area microelectronics, especially because of their application as active elements in flat panel displays. Different deposition techniques are in tough competition with the objective to obtain device-quality polysilicon thin films at low temperature. In this paper we present the preliminary results obtained with the fabrication of TFT deposited by hot-wire chemical vapor deposition (HWCVD). Some results concerned with the structural characterization of the material and electrical performance of the device are presented

Substrate influence on the properties of doped thin silicon layers grown by Cat-CVD

We present structural and electrical properties for p- and n-type layers grown close to the transition between a-Si:H and nc-Si:H onto different substrates: Corning 1737 glass, ZnO:Al-coated glass and stainless steel. Structural properties were observed to depend on the substrate properties for samples grown under the same deposition conditions. Different behaviour was observed for n- and p-type material. Stainless steel seemed to enhance crystallinity when dealing with n-type layers, whereas an increased crystalline fraction was obtained on glass for p-type samples. Electrical conduction in the direction perpendicular to the substrate seemed to be mainly determined by the interfaces or by the existence of an amorphous incubation layer that might determine the electrical behaviour. In the direction perpendicular to the substrate, n-type layers exhibited a lower resistance value than p-type ones, showing better contact properties between the layer and the substrate

Control of doped layers in p-i-n microcrystalline solar cells fully deposited with HWCVD

In this paper, the influence of the deposition conditions on the performance of p-i-n microcrystalline silicon solar cells completely deposited by hot-wire chemical vapor deposition is studied. With this aim, the role of the doping concentration, the substrate temperature of the p-type layer and of amorphous silicon buffer layers between the p/i and i/n microcrystalline layers is investigated. Best results are found when the p-type layer is deposited at a substrate temperature of 125 °C. The dependence seen of the cell performance on the thickness of the i layer evidenced that the efficiency of our devices is still limited by the recombination within this layer, which is probably due to the charge of donor centers most likely related to oxygen

Thin Film Transistors obtained by Hot-Wire CVD

Hydrogenated microcrystalline silicon films obtained at low temperature (150-280°C) by hot wire chemical vapour deposition at two different process pressures were measured by Raman spectroscopy, X-ray diffraction (XRD) spectroscopy and photothermal deflection spectroscopy (PDS). A crystalline fraction >90% with a subgap optical absortion 10 cm -1 at 0.8 eV were obtained in films deposited at growth rates >0.8 nm/s. These films were incorporated in n-channel thin film transistors and their electrical properties were measured. The saturation mobility was 0.72 ± 0.05 cm 2/ V s and the threshold voltage around 0.2 eV. The dependence of their conductance activation energies on gate voltages were related to the properties of the material

Analysis by Finite Element Calculations of Light Scattering in Laser-textured AZO Films for PV thin-film Solar Cells

In the thin-film photovoltaic industry, to achieve a high light scattering in one or more of the cell interfaces is one of the strategies that allow an enhancement of light absorption inside the cell and, therefore, a better device behavior and efficiency. Although chemical etching is the standard method to texture surfaces for that scattering improvement, laser light has shown as a new way for texturizing different materials, maintaining a good control of the final topography with a unique, clean, and quite precise process. In this work AZO films with different texture parameters are fabricated. The typical parameters used to characterize them, as the root mean square roughness or the haze factor, are discussed and, for deeper understanding of the scattering mechanisms, the light behavior in the films is simulated using a finite element method code. This method gives information about the light intensity in each point of the system, allowing the precise characterization of the scattering behavior near the film surface, and it can be used as well to calculate a simulated haze factor that can be compared with experimental measurements. A discussion of the validation of the numerical code, based in a comprehensive comparison with experimental data is include

Investigation of defect formation and electronic transport in microcrystalline silicon deposited by hot-wire CVD

We have investigated doped and undoped layers of microcrystalline silicon prepared by hot-wire chemical vapour deposition optically, electrically and by means of transmission electron microscopy. Besides needle-like crystals grown perpendicular to the substrate's surface, all of the layers contained a noncrystalline phase with a volume fraction between 4% and 25%. A high oxygen content of several per cent in the porous phase was detected by electron energy loss spectrometry. Deep-level transient spectroscopy of the crystals suggests that the concentration of electrically active defects is less than 1% of the undoped background concentration of typically 10^17 cm -3. Frequency-dependent measurements of the conductance and capacitance perpendicular to the substrate surface showed that a hopping process takes place within the noncrystalline phase parallel to the conduction in the crystals. The parasitic contribution to the electrical circuit arising from the porous phase is believed to be an important loss mechanism in the output of a pin-structured photovoltaic solar cell deposited by hot-wire CVD

Analysis of bias stress on thin-film transistors obtained by Hot-Wire Chemical Vapour Deposition

The stability under gate bias stress of unpassivated thin film transistors was studied by measuring the transfer and output characteristics at different temperatures. The active layer of these devices consisted of in nanocrystalline silicon deposited at 125 °C by Hot-Wire Chemical Vapour Deposition. The dependence of the subthreshold activation energy on gate bias for different gate bias stresses is quite different from the one reported for hydrogenated amorphous silicon. This behaviour has been related to trapped charge in the active layer of the thin film transistor

Surface passivation of crystalline silicon by Cat-CVD amorphous and nanocrystalline thin silicon films

In this work, we study the electronic surface passivation of crystalline silicon with intrinsic thin silicon films deposited by Catalytic CVD. The contactless method used to determine the effective surface recombination velocity was the quasi-steady-state photoconductance technique. Hydrogenated amorphous and nanocrystalline silicon films were evaluated as passivating layers on n- and p-type float zone silicon wafers. The best results were obtained with amorphous silicon films, which allowed effective surface recombination velocities as low as 60 and 130 cms -1 on p- and n-type silicon, respectively. To our knowledge, these are the best results ever reported with intrinsic amorphous silicon films deposited by Catalytic CVD. The passivating properties of nanocrystalline silicon films strongly depended on the deposition conditions, especially on the filament temperature. Samples grown at lower filament temperatures (1600 °C) allowed effective surface recombination velocities of 450 and 600 cms -1 on n- and p-type silicon