26 research outputs found

    A dynamically tunable memory hierarchy

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    Dynamic IPC/clock rate optimization

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    Selective cache ways: on-demand cache resource allocation

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    Message from the Program Chair

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    Localized Microarchitecture-Level Voltage Management

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    Runtime reconfiguration techniques for efficient general-purpose computation

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    Improving the memory bandwidth of highly-integrated, wide-issue, microprocessor-based systems

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    Architecture and technology tradeoffs in the design of next-generation multiprocessor servers

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    Front-end policies for improved issue efficiency in SMT processors

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