Investigation of a noise-shaping accelerometer interface circuit for two-chip implementation

The world market for sensors is several hundred million dollars growing at an annual rate of 20 percent with accelerometers comprising 19 percent of the market. With an increasing market, a wide range of applications with varying degrees of resolution are in demand. Therefore, there is sufficient motivation for developing new architectures that are more accurate, reliable, less costly, and easy to implement in any given application. This research investigates a new proposed architecture intended to improve each of the mentioned motivations. Capacitive sensors and their electrical interfaces measure the displacement of a suspended beam mass in response to an input acceleration. The studied architecture is a two-chip solution with the capacitive sensor and electrical interface fabricated independently. This two-chip approach has several advantages. The micro-machining process for capacitive sensors is difficult with lower yields than most VLSI technologies. By fabricating the electrical interface in a different process with higher yields and smaller geometries, the cost of the architecture is reduced. As micro-machining yields improve, this advantage will diminish in favor of single-chip integration of the sensor and interface. If the production volumes are high and a single-chip solution is best suited for a particular application, this architecture can be easily integrated on one chip. Another advantage of a two-chip solution is the ease of implementation. The sensor is able to he placed at the point of interest while the electrical interface can be placed in a more convenient location. Also, several sensors can be multiplexed to one electrical interface. Sensors can be replaced while keeping the interface circuitry intact. This lowers cost and increases reliability of the system. Given its flexibility, the architecture is easy to implement and maintain in most applications

ACKNOWLEDGMENTS

Earning my master of science at Oregon State University has been a very rewarding experience. As with any challenge, it begins eagerly with an opportunity and ends successfully with determination and perseverance, learning and training, support from mentors, colleagues, and friends, and a certain amount of luck. With gratitude, I thank Professor Moon and Professor Temes for offering me the opportunity to study within their research group. I have benefited from their guidance, support, and technical expertise. Professor Temes has been a great influence in laying my Data Converter foundation through discussion, studies, and course work. There are several companies, organizations, and individuals that have supported this research project. The financial support from the Catalyst Foundation and Yamatake Corporation is gratefully acknowledged. I wish to thank Tetsuya Kajita for providing the groundwork, technical discussions, thesis notes, and friendship. Appreciation to Paul Ferguson and Steve Lewis of Analog Devices Inc. for their initial investigation and supplying the capacitive sensors is acknowledged. I appreciate MOSIS for their understanding and support over the digital pad dilemma and for the fabrication of the experimental circuits

ACKNOWLEDGMENTS

I wish to express my deepest gratitude to my research advisors, Dr. Gábor Temes and Dr. Un-Ku Moon, who provided me with an excellent research environment. I feel greatly honored to have worked under the guidance of Dr. Temes. I benefited from his extensive knowledge in circuit design, invaluable teaching and research skills, and support in technical and personal matters. I thank him for his kindness, friendship, and for being a source of inspiration at every level. It was also a great honor to have been advised by Dr. Moon. I learned many fundamental circuit design skills from him. I appreciated his enthusiastic, always honest feedback. I thank him for his valuable guidance and encouragement throughout my research. I would like to thank Prof. Karti Mayaram, Prof. Huaping Liu, Dr. Adrian Earl