35 research outputs found

    Feasibility of quantum key distribution from high altitude platforms

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    This paper presents the feasibility study of deploying Quantum Key Distribution (QKD) from High Altitude Platforms (HAPs), as a way of securing future communications applications and services. The paper provides a thorough review of the state of the art HAP technologies and summarises the benefits that HAPs can bring to the QKD services. A detailed link budget analysis is presented in the paper to evaluate the feasibility of delivering QKD from stratospheric HAPs flying at 20 km altitude. The results show a generous link budget under most operating conditions which brings the possibility of using diverged beams, thereby simplifying the Pointing, Acquisition and Tracking (PAT) of the optical system on the HAPs and ground, potentially widening the range of future use cases where QKD could be a viable solution.Comment: 12 pages, 11 figures. Comments are welcom

    Results From The Ncc/nicmos Spare-Detector June 2000 Emi Test

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    this report, other than a first quick-look at the asynchronouly sampled data, we discuss only the results derived from the 26-read 1.2-second deltatime multiaccum

    Computational Logic Inc. 1717 W. 6th St. Suite 290 Austin, Texas 78703 (512) 322-9951

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    Consider a network of four processors that use the Oral Messages (Byzantine Generals) algorithm of Pease, Shostak and Lamport to achieve agreement in the presence of faults. Bevier and Young have published a functional description of a single processor that, when interconnected appropriately with three identical others, implements this network under the assumption that the four processors step in synchrony. By formalizing the original Pease, Shostak and Lamport work, Bevier and Young mechanically proved that such a network achieves fault tolerance. In this paper we develop, formalize and discuss a hardware design that has been mechanically proved to implement their processor. In particular, we formally define mapping functions from the abstract state space of the Bevier-Young processor to a concrete state space of a hardware module and state a theorem that expresses the claim that the hardware correctly implements the processor. We briefly discuss the Brock-Hunt Formal Hardware Descrip..
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