High Performance and Low Power VLSI Synchronous Systems Using an Explicit Pulsed Dual Edge Triggered Flip Flops

ABSTRACT: An explicit pulsed dual edge triggered sense amplifier flip flops (DET-FF).In this dual edge triggered sense amplifier flip flop is used for low-power consumption and high performance application. By incorporating the dual edge triggering mechanism, the dual edge triggered flip flop is able to achieve low power consumption that has minimum delay. Clock gating is a popular technique used in many synchronous circuits; hence, the power dissipation is very much reduced. Reducing dynamic power reduction. Clock gating saves power by adding more logic gates in the circuit. It can be used in various applications like digital VLSI clocking system, buffers, registers, microprocessors etc. KEYWORDS: Clock pulse gating,high performance,low power,delay,pulse dual edge triggered, sense amplifier flip flop. I. INTRODUCTION In many digital very large scale integration (VLSI) design, which consists of the clock distribution network and timing elements, is one of the most power consumption. Flip-flops are critical timing elements in digital circuits which have a large impact on circuit speed and power consumption. The performance of the Flip-Flop is an important element to determine the performance of the whole synchronous circuit. In this dual edge triggered sense amplifier as developed from single edge triggered sense amplifier flip flops. At each rising or falling edge of a clock signal, the data stored in a set of flip-flops is readily available so that it can be applied as inputs to other combinational or sequential circuitry. Such flip-flops that store data on both the leading edge and the trailing edge of a clock pulse are referred to as double-edge triggered flip-flops otherwise it is called as single edge triggered flip-flops. The dual edge triggering is a very important technique is to reduce the power consumption in the clock distribution network. In this dual edge triggering is to introduce the clock gating. In this clock gating with clock storage element is to reduce the dynamic power. Two types of clock gating are used in the dual edge triggering mechanism. These are latch free clock gating and latch based clock gating. When technology scales down, total power dissipation will decrease and at the same time delay varies depends upon supply voltage, threshold voltage, oxide thickness. II.DUAL EDGE TRIGGERED FLIP FLOP The dual edge triggered flip flops have two stages. These are pulse generator stage and latching stage. If the clock pulse as the input of the pulse generator. It produces the triggering pulse signal. Latching stage as generate the output pulse signal. In this dual edge triggering flip flop used two types of clock gating. These are latch based clock gating and latch free clock gating. The general block is shown i

The Impact of Effective Team Building in Workplace

In the business world people who come with the organized to work toward a conjoint goal are called teams. The shared vision, cohesion, cooperation, mutual trust, and absolute transparency of the roles and also responsibilities are hallmarks of a high-performance team. In many cases, the HR manager acts as facilitator in the process of building a high-performing team. HR manager's role in creating high-performing teams based on shared responsibilities, mutual trust, and cooperation is examined in this paper. Different team building exercises like games, fun exercises, and group activities are also discussed as a means of effective team building

Electrochemically Exfoliated Graphene for Nanosensor Applications

Water dispersible graphene layer are the excellent nano materials used for wide range of electronic applications. High quality graphene was synthesized by an eco-friendly, easy and cost effective electrochemical exfoliation method. In this work, graphite rod was used both as an anode and cathode for the production of graphene. Potassium sulphate (K2SO4) was used as an intercalating agent. Electrochemically exfoliated graphene (EEG) was coated on glassy carbon electrode (GCE) and evaluated towards the electrochemical oxidation of vanillin and L-phenylalanine. The fabricated electrode was able to detect vanillin and L-Phenylalanine as low as 0.2 μM with signal to noise ratio of 3. A significant increase in the current was observed for the graphene coated electrode for both vanillin and L-phenylalanine when compared to bare Glassy electrode. The finding clearly demonstrated the higher detection capability, selectivity and reproducibility of EEG.</jats:p

Non-enzymatic glucose sensing platform using self assembled cobalt oxide/graphene nanocomposites immobilized graphite modified electrode

A new strategy to prepare the densely packed cobalt oxide (Co3O4)/graphene nanocomposites by a self-assembly method were adopted in this work. A new non-enzymatic glucose determination has been fabricated by using Co3O4/graphene nanocomposites modified electrode as a sensing material. The nanocomposites were characterized using X-ray diffraction, X-ray photoelectron spectroscopy and field emission scanning electron microscopy, which confirms the successful formation of dense packed Co3O4/graphene nanocomposite. The results of Co3O4/graphene nanocomposites modified electrode exhibit good electrocatalytic activity toward the oxidation of glucose in 0.1 M NaOH by cyclic voltammetry. Under optimal conditions, the oxidation peak current was proportional to the glucose concentration in the range from 16.0 A mu M to 1.3 mM with a detection limit of 0.5 A mu M. The determination of glucose with the modified electrode shows the advantages of ease of preparation, high sensitivity and good stability. The analytical utility of the modified electrode as an amperometric sensor for the determination of glucose in the flow systems was evaluated by chronoamperometric studies. The practical application of the modified electrode for glucose determination has been evaluated in urine samples

Survey on Grid Resource Allocation Mechanisms

Grid is a distributed high performance computing paradigm that offers various types of resources (like computing, storage, communication) to resource-intensive user tasks. These tasks are scheduled to allocate available Grid resources efficiently to achieve high system throughput and to satisfy user requirements. The task scheduling problem has become more complex with the ever increasing size of Grid systems. Even though selecting an efficient resource allocation strategy for a particular task helps in obtaining a desired level of service, researchers still face difficulties in choosing a suitable technique from a plethora of existing methods in literature. In this paper, we explore and discuss existing resource allocation mechanisms for resource allocation problems employed in Grid systems. The work comprehensively surveys Gird resource allocation mechanisms for different architectures (centralized, distributed, static or dynamic). The paper also compares these resource allocation mechanisms based on their common features such as time complexity, searching mechanism, allocation strategy, optimality, operational environment and objective function they adopt for solving computing- and data-intensive applications. The comprehensive analysis of cutting-edge research in the Grid domain presented in this work provides readers with an understanding of essential concepts of resource allocation mechanisms in Grid systems and helps them identify important and outstanding issues for further investigation. It also helps readers to choose the most appropriate mechanism for a given system/application