STGC ASSEMBLING AND TESTING IN CHILE FOR THE ATLAS MUON SPECTROMETER

The forthcoming luminosity upgrade of LHC will increase the expected background rate in the forward region of the ATLAS Muon Spectrometer. The most important upgrade project for the ATLAS is the replacement of the present Small Wheel by the so-called New Small Wheel (NSW). The NSW will be installed during the LHC long shutdown in 2019/2020. A small-strip Thin Gap Chamber (sTGC) was developed to provide fast trigger and high precision muon tracking under high luminosity LHC condition. Construction of sTGC modules is performed by five countries: Canada, Chile, China, Israel, and Russia. Construction of sTGC wedges is performed at CERN in a collaborative effort. Production in Chile is presented here including testing results as well as first wedge construction

Small-Strip Thin Gap Chambers for the Muon Spectrometer Upgrade of the ATLAS Experiment

The instantaneous luminosity of the Large Hadron Collider at CERN will be increased up to a factor of five with respect to the design value by undergoing an extensive upgrade program over the coming decade. Such increase will allow for precise measurements of Higgs boson properties and extend the search for new physics phenomena beyond the Standard Model. The largest phase-1 upgrade project for the ATLAS Muon System is the replacement of the present first station in the forward regions with the so-called New Small Wheels (NSWs) during the long-LHC shutdown in 2019/20. Along with Micromegas, the NSWs will be equipped with eight layers of small-strip thin gap chambers (sTGC) arranged in multilayers of two quadruplets, for a total active surface of more than 2500 m$^2$. All quadruplets have trapezoidal shapes with surface areas up to 2 m$^2$. To retain the good precision tracking and trigger capabilities in the high background environment of the high luminosity LHC, each sTGC plane must achieve a spatial resolution better than 100 μm to allow the Level-1 trigger track segments to be reconstructed with an angular resolution of approximately 1mrad. The basic sTGC structure consists of a grid of gold-plated tungsten wires sandwiched between two resistive cathode planes at a small distance from the wire plane. The precision cathode plane has strips with a 3.2mm pitch for precision readout and the cathode plane on the other side has pads for triggering. The position of each strip must be known with an accuracy of 30 µm along the precision coordinate and 80 µm along the beam. The mechanical precision is a key point and must be controlled and monitored all along the process of construction and integration. The sTGC detectors are currently being produced and tested in five countries and assembled into wedges at CERN for integration into ATLAS. The sTGC design, performance, construction and integration status will be discussed, along with results from tests of the chambers with nearly final electronics with beams and cosmic rays

Status of the MDT Trigger Processor for the ATLAS Level-0 Muon Trigger at the HL-LHC

The MDT Trigger Processor (MDTTP) is a key ATLAS Level-0 Muon trigger upgrade component designed to meet High-Luminosity LHC requirements. The MDTTP will use MDT hits in the trigger for the first in ATLAS to improve the momentum resolution of muon candidates provided by RPC and TGC detectors and reduce fake muon trigger rate. The MDTTP hardware is based on the Apollo ATCA platform. The pre-production prototype includes a VU13P-FPGA, high-speed FireFly optical transceivers, peripherals, and other improvements learned from using the previous hardware demonstrator. We present the prototype status, firmware implementation, core algorithm, slow-control software, and first integration tests

Status of the MDT Trigger Processor for the ATLAS Level-0 Muon Trigger at the HL-LHC

The MDT Trigger Processor (MDTTP) is a key ATLAS Level-0 Muon trigger upgrade component designed to meet High-Luminosity LHC requirements. The MDTTP will use MDT hits in the hardware level trigger for the first time in ATLAS to improve the momentum resolution of muon candidates provided by RPC and TGC detectors and reduce the fake muon trigger rate. The MDTTP hardware is based on the Apollo ATCA platform. The prototype includes a VU13P-FPGA, high-speed FireFly optical transceivers, peripherals, and other improvements learned from using the previous hardware demonstrator. We present the prototype status, firmware implementation, core algorithm, slow-control software, and first integration tests

Operation and performance of the ATLAS semiconductor tracker in LHC Run 2

Abstract The semiconductor tracker (SCT) is one of the tracking systems for charged particles in the ATLAS detector. It consists of 4088 silicon strip sensor modules. During Run 2 (2015–2018) the Large Hadron Collider delivered an integrated luminosity of 156 fb-1 to the ATLAS experiment at a centre-of-mass proton-proton collision energy of 13 TeV. The instantaneous luminosity and pile-up conditions were far in excess of those assumed in the original design of the SCT detector. Due to improvements to the data acquisition system, the SCT operated stably throughout Run 2. It was available for 99.9% of the integrated luminosity and achieved a data-quality efficiency of 99.85%. Detailed studies have been made of the leakage current in SCT modules and the evolution of the full depletion voltage, which are used to study the impact of radiation damage to the modules.</jats:p