Negative Capacitance for Stabilizing the Logic State in a Tunnel Field-Effect Transistor

Ferroelectric negative capacitance field-effect transistors, or FE-NCFETs, are promising device architectures for achieving improved performance in terms of hysteresis, on–off ratio, and power consumption. The study investigates the influence of negative capacitance (NC) on the transfer characteristics of van der Waals field-effect transistors below and above a critical voltage (Vth) on the heterophase of the CuInP2S6 (CIPS) gate ferroelectric. Notably, a less pronounced NC resulting from the spatial distribution of the ferroelectric and paraelectric phases plays a crucial role in stabilizing n-channel conductance by dual gate modulation. This results in the emergence of a nonvolatile logic state between the two binary states typical of conventional tunnel field-effect transistors (TFETs). Concerned study proposed NCTFETs based on ferroionic crystals as promising devices for generating a stable logic state below the coercive voltage. In addition, tunneling and voltage pinning effects play a key role for enhancement of the transistor’s on–off ratio

Manipulating Edge Current in Hexagonal Boron Nitride via Doping and Friction

We map spatially correlated electrical current on the stacking boundaries of pristine and doped hexagonal boron nitride (hBN) to distinguish from its insulating bulk via conductive atomic force microscopy (CAFM). While the pristine edges of hBN show an insulating nature, the O-doped edges reveal a current 2 orders of higher even for bulk layers where the direct transmission through tunnel barrier is implausible. Instead, the nonlinear current–voltage characteristics (I–V) at the edges of O-doped hBN can be explained by trap-assisted lowering of the tunnel barrier by adopting a Poole–Frenkel (PF) model. However, in the stacked heterostructure with multilayer graphene (MLG) on top, the buried edge of pristine hBN shows a signature of electron conduction in the scanning mode which contradicts the first-principle calculation of spatial distribution of local density of states (LDOS) data. Enhancement of friction between the Pt-tip and MLG at the step-edge of the heterostructure while scanning in the contact mode has prompted us to construct a phenomenological model where the localization of opposite surface charges on two conducting plates (MLG and Si substrate) containing a dielectric film (hBN) with negatively charged defects creates an internal electric field opposite to the external electric field due to the applied voltage bias in the CAFM setup. An equivalent circuit with a parallel resistor network based on a vertical conducting channel through the MLG/hBN edge and an in-plane surface carrier transport through MLG can successfully analyze the current maps on pristine/doped hBN and the related heterostructures. These results yield fundamental insight into the emerging field of insulatronics in which defect-induced electron transport along the edge can be manipulated in an 1D–2D synergized insulator