Bloch inductance in small-capacitance Josephson junctions

We show that the electrical impedance of a small-capacitance Josephson junction includes besides the capacitive term $-i/\omega C_B$ also an inductive term $i\omega L_B$. Similar to the known Bloch capacitance $C_B(q)$, the Bloch inductance $L_B(q)$ also depends periodically on the quasicharge $q$, and its maximum value achieved at $q=e (\textrm{mod} 2e)$ always exceeds the value of the Josephson inductance of this junction $L_J(\phi)$ at fixed $\phi=0$. The effect of the Bloch inductance on the dynamics of a single junction and a one-dimensional array is described.Comment: 5 pages incl. 3 fig

Assessing T cell clonal size distribution: a non-parametric approach

Clonal structure of the human peripheral T-cell repertoire is shaped by a number of homeostatic mechanisms, including antigen presentation, cytokine and cell regulation. Its accurate tuning leads to a remarkable ability to combat pathogens in all their variety, while systemic failures may lead to severe consequences like autoimmune diseases. Here we develop and make use of a non-parametric statistical approach to assess T cell clonal size distributions from recent next generation sequencing data. For 41 healthy individuals and a patient with ankylosing spondylitis, who undergone treatment, we invariably find power law scaling over several decades and for the first time calculate quantitatively meaningful values of decay exponent. It has proved to be much the same among healthy donors, significantly different for an autoimmune patient before the therapy, and converging towards a typical value afterwards. We discuss implications of the findings for theoretical understanding and mathematical modeling of adaptive immunity.Comment: 13 pages, 3 figures, 2 table

Josephson tunnel junctions with nonlinear damping for RSFQ-qubit circuit applications

We demonstrate that shunting of Superconductor-Insulator-Superconductor Josephson junctions by Superconductor-Insulator-Normal metal (S-I-N) structures having pronounced non-linear I-V characteristics can remarkably modify the Josephson dynamics. In the regime of Josephson generation the phase behaves as an overdamped coordinate, while in the superconducting state the damping and current noise are strikingly small, that is vitally important for application of such junctions for readout and control of Josephson qubits. Superconducting Nb/AlO${_x}$/Nb junction shunted by Nb/AlO${_x}$/AuPd junction of S-I-N type was fabricated and, in agreement with our model, exhibited non-hysteretic I-V characteristics at temperatures down to at least 1.4 K.Comment: 4 pages incl. 3 figure

Single-charge devices with ultrasmall Nb/AlOx/Nb trilayer Josephson junctions

Josephson junction transistors and 50-junction arrays with linear junction dimensions from 200 nm down to 70 nm were fabricated from standard Nb/AlOx/Nb trilayers. The fabrication process includes electron beam lithography, dry etching, anodization, and planarization by chemical-mechanical polishing. The samples were characterized at temperatures down to 25 mK. In general, all junctions are of high quality and their I-U characteristics show low leakage currents and high superconducting energy gap values of 1.35 meV. The characteristics of the transistors and arrays exhibit some features in the subgap area, associated with tunneling of Cooper pairs, quasiparticles and their combinations due to the redistribution of the bias voltage between the junctions. Total island capacitances of the transistor samples ranged from 1.5 fF to 4 fF, depending on the junction sizes. Devices made of junctions with linear dimensions below 100 nm by 100 nm demonstrate a remarkable single-electron behavior in both superconducting and normal state. We also investigated the area dependence of the junction capacitances for transistor and array samples.Comment: 19 pages incl. 2 tables and 11 figure

Metallic single-electron transistor without traditional tunnel barriers

We report on a new type of single-electron transistor (SET) comprising two highly resistive Cr thin-film strips (~ 1um long) connecting a 1 um-long Al island to two Al outer electrodes. These resistors replace small-area oxide tunnel junctions of traditional SETs. Our transistor with a total asymptotic resistance of 110 kOhm showed a very sharp Coulomb blockade and reproducible, deep and strictly e-periodic gate modulation in wide ranges of bias currents I and gate voltages V_g. In the Coulomb blockade region (|V| < 0.5 mV), we observed a strong suppression of the cotunneling current allowing appreciable modulation curves V-V_g to be measured at currents I as low as 100 fA. The noise figure of our SET was found to be similar to that of typical Al/AlOx/Al single-electron transistors.Comment: 5 pages incl. 4 fig

Aluminum Single Electron Transistors with Islands Isolated from a Substrate

The low-frequency noise figures of single-electron transistors (electrometers) of traditional planar and new stacked geometry were compared. We observed a correlation between the charge noise and the contact area of the transistor island with a dielectric substrate in the set of Al transistors located on the same chip and having almost similar electric parameters. We have found that the smaller the contact area the lower the noise level of the transistor. The lowest noise value 8*10E-6 e/sqrt(Hz) at f = 10 Hz. has been measured in a stacked transistor with an island which was completely isolated from a substrate. Our measurements have unambiguously indicated that the dominant source of the background charge fluctuations is associated with a dielectric substrateComment: Review paper, latex, 10 pages, 7 figures, to be publ. in JLTP, 2000; Proceeding of "Electron Transport in Mesoscopic Systems", August 12-15, 1999 Geteborg, Sweden, http://fy.chalmers.se/meso_satellite/index.html See also LT22 manuscript: http://lt22.hut.fi/cgi/view?id=S1113

Noise in Al single electron transistors of stacked design

We have fabricated and examined several Al single electron transistors whose small islands were positioned on top of a counter electrode and hence did not come into contact with a dielectric substrate. The equivalent charge noise figure of all transistors turned out to be surprisingly low, (2.5 - 7)*10E-5 e/sqrt(Hz) at f = 10 Hz. Although the lowest detected noise originates mostly from fluctuations of background charge, the noise contribution of the tunnel junction conductances was, on occasion, found to be dominant.Comment: 4 pages of text with 1 table and 5 figure

Radio-frequency Bloch-transistor electrometer

A quantum-limited electrometer based on charge modulation of the Josephson supercurrent in the Bloch transistor inserted into a superconducting ring is proposed. As this ring is inductive coupled to a high-Q resonance tank circuit, the variations of the charge on the transistor island (input signal) are converted into variations of amplitude and phase of radio-frequency oscillations in the tank. These variations are amplified and then detected. The output noise, the back-action fluctuations and their cross-correlation are computed. It is shown that our device enables measurements of the charge with a sensitivity which is determined by the energy resolution of its amplifier, that can be reduced down to the standard quantum limit of \hbar/2. On the basis of this setup a "back-action-evading" scheme of the charge measurements is proposed.Comment: 5 pages incl. 2 figure

Two-junction superconductor-normal metal single-electron trap in a combined on-chip RC environment

Dissipative properties of the electromagnetic environment as well as on-chip RC filtering are shown to suppress random state switchings in the two-junction superconductor(S) - normal metal(N) electron trap. In our experiments, a local high-ohmic resistor increased the hold time of the trap by up to two orders of magnitude. A strong effect of on-chip noise filtering was observed for different on-chip geometries. The obtained results are promising for realization of the current standard on the basis of the S-N hybrid turnstile.Comment: 4 pages 3 figures LT2

Cooper pair cotunneling in single charge transistors with dissipative electromagnetic environment

We observed current-voltage characteristics of superconducting single charge transistors with on-chip resistors of R about R_Q = h/4e^2 = 6.45 kOhm, which are explained in terms of Cooper-pair cotunneling. Both the effective strength of Josephson coupling and the cotunneling current are modulated by the gate-induced charge on the transistor island. For increasing values of the resistance R we found the Cooper pair current at small transport voltages to be dramatically suppressed.Comment: 4 pages and 2 figure