Modified Binary Vedic Multiplication Using Carry Save Adder

This paper presents modified binary Vedic multiplication using carry save adder. The suggested modified binary Vedic multiplication technique is more efficient in terms of delay. The proposed circuit is implemented in Verilog HDL. The Xilinx ISE Design Suite 14.6 is used for circuit synthesis. The simulation done for 4-bit ,8-bit 16-bit multiplication operations. In this paper, the simulation waveforms are shown only for 4-bit and 8-bit multiplication operation based on the modified Vedic multiplication technique using carry save adder. The vedic multiplication method can be extended for a larger bit size. The delay compared with normal multiplication technique.</jats:p

Effect of spacing and fertilizer levels on yield, quality and nutrient uptake of fennel (Foeniculum vulgare Mill.) under northern dry zone of Karnataka

An experiment was carried out on effect of spacing and fertilizer levels on yield, quality and nutrient uptake of fennel (Foeniculum vulgare Mill.) under northern dry zone of Karnataka. Among various spacing levels, 60 x 30 cm spacing recorded highest seed yield. The highest essential oil content and essential oil yield was obtained in 60 x 40 cm spacing. Nutrient uptake was found maximum in 60 x 30 cm spacing. The maximum seed yield, essential oil content, oil yield and total nutrient uptake was obtained by supplying 100:50:40 NPK kg ha-1 and it was at par with 90:40:30 N, P2O5, K2O kg ha-1 respectively.</jats:p